Writing

Thoughts on systems engineering, performance, and continuous learning.

Designing the Binary Wire Protocol for a C++ Limit Order Book Matching Engine

Designed a zero-parsing, cache-aligned binary wire protocol for a C++ matching engine with deterministic byte-offset message layouts

Single Threaded epoll Matching Engine in C++ for Deterministic Order Execution

How one CPU thread and Linux epoll enforce price and time priority in a C++ limit order book, with zero locks and zero heap allocation on the matching path

Decoupled Vector-Map Data Layout for Allocation-Free Limit Order Book

An architectural guide to a 3-layer C++ order book layout using a flat vector memory pool and shallow map to achieve O(1) FIFO queue operations.

Python GIL Trap in Low-Latency Async Pipelines

We stopped market-volatility event loop freezes by micro-batching Pydantic payloads into a single GIL-efficient thread handoff for flatline reliability

Stabilizing a High-Frequency Trading Gateway: How We Reclaimed Our Event Loop Under Extreme Market Volatility

Fixed trading pipeline message drops by replacing blocking writes and GIL-heavy validation with an async micro-batching architecture

The Packet Was Already Late Before My Application Saw It

Today I followed a market data packet from the network card all the way to the application and realized that latency can appear long before our code even starts running.

A Growing Queue Doesn't Mean You Need More Workers

A System Can Be Technically Working and Still Be Failing Its Users

What happens when a system can process 10,000 requests per second but suddenly receives 15,000? Today's exploration led me through queueing, backpressure, retries, and a different way of thinking about overload.

Latency doesn’t come from one place. It accumulates across the entire system

Good engineering decisions start with questions, not answers